1. Field of the Invention
The present invention relates to an imaging device.
Priority is claimed on Japanese Patent Application No. 2011-286028 filed on Dec. 27, 2011, the content of which is incorporated herein by reference.
2. Description of Related Art
In recent years, imaging devices such as digital cameras have come equipped with an auto focus (AF) function. As a method of implementing an AF function in an imaging device according to a related art, so-called imager AF has been known that uses hill-climbing control of detecting a focusing position on a subject by sequentially moving the position of a focus lens in a predetermined direction based on a pixel signal output from a solid-state imaging device (hereinafter referred to as an “image sensor”). In the imager AF, an AF evaluation value used to perform AF control is generated based on a pixel signal output from an image sensor in real time, and the position of a focus lens is controlled based on the generated AF evaluation value (see Japanese Unexamined Patent Application, First Publication 2005-252484).
FIG. 9 is a block diagram illustrating a schematic configuration of an imaging device according to a related art. Referring to FIG. 9, an imaging device includes an image sensor, an imaging processing unit, an image processing unit, a Dynamic Random Access Memory (DRAM) controller, a DRAM, a display processing unit, a display device, and a central processing unit (CPU). Further, the imaging processing unit, the image processing unit, the display processing unit, the CPU, and the DRAM controller which are included in the imaging device are connected to a common data bus, and data passing when each component performs processing is performed via the data bus. FIG. 9 also illustrates a schematic configuration of the imaging processing unit. Referring to FIG. 9, the imaging processing unit includes an imaging interface (IF) unit, a pre-processing unit, an AE evaluation value generating unit, an AWB evaluation value generating unit, an AF evaluation value generating unit, and an output Direct Memory Access (DMA) unit.
In the imaging device of the related art illustrated in FIG. 9, the imaging IF unit acquires a pixel signal from the image sensor, and outputs the acquired pixel signal to the pre-processing unit as image data. The pre-processing unit executes various kinds of processing on the image data input from the imaging IF unit. FIG. 9 illustrates an example of the pre-processing unit including three processing units that perform processing. The pre-processing unit outputs final image data obtained by performing sequential processing by the respective processing units to the AE evaluation value generating unit, the AWB evaluation value generating unit, the AF evaluation value generating unit, and the output DMA unit.
The output DMA unit stores the image data input from the pre-processing unit in the DRAM via the DRAM controller. Here, the image data stored in the DRAM is used as original image data which is to be subjected to image processing later by the image processing unit.
The AF evaluation value generating unit generates an AF evaluation value based on the image data input from the pre-processing unit. The AF evaluation value generating unit stores the generated AF evaluation value in the DRAM via the DRAM controller. The CPU uses the AF evaluation value stored in the DRAM and performs AF control in the imaging device according to the related art, that is, control of the position of a focus lens.
The AE evaluation value generating unit and the AWB evaluation value generating unit are evaluation value generating units that generate evaluation values used to perform control such as auto exposure (AE) and auto white balance (AWB) as capturing-related control other than AF in the imaging device according to the related art. The AE evaluation value generating unit and the AWB evaluation value generating unit generate an AE evaluation value and an AWB evaluation value, respectively, based on the image data input from the pre-processing unit, similarly to the AF evaluation value generating unit. The AE evaluation value generating unit and the AWB evaluation value generating unit store the generated AE evaluation value and the AWB evaluation value, respectively, in the DRAM via the DRAM controller. The CPU performs AE and AWB control in the imaging device according to the related art using the AE evaluation value and the AWB evaluation value stored in the DRAM.
The AF evaluation value generating unit, the AE evaluation value generating unit, and the AWB evaluation value generating unit may be configured to hold the generated AF evaluation value, AE evaluation value, and AWB evaluation value, respectively, in registers in the respective evaluation value generating units instead of storing the generated evaluation values in the DRAM. In the case of this configuration, the CPU receives a notice representing that generation of the evaluation values has been completed from the evaluation value generating units, and then reads the evaluation values held in the registers in the respective evaluation value generating units. The CPU performs AF, AE, and AWB control in the imaging device using the read evaluation values.
Through this configuration, in the imaging device according to the related art, each time a pixel signal is acquired from the image sensor, the AF evaluation value, the AE evaluation value, and the AWB evaluation value are generated, and capturing-related control is performed in the imaging device.
Further, in the imaging device according to the related art, there is a demand for an increase in the speed of the AF function, that is, an increase in the focusing speed. For this reason, in the imaging device in which the imager AF of the related art is mounted, a method of increasing the speed of reading a pixel signal from the image sensor, that is, a method of increasing a frame rate, is employed as a method of increasing the focusing speed. As the frame rate increases, the number of AF evaluation values, each of which is obtained each time the pixel signal is acquired from the image sensor, that is, for each imaged frame, increases.
The imaging device according to the related art has a so-called live view function of causing a moving image used to check a subject to be captured to be displayed on a display device such as a thin film transistor (TFT) liquid crystal display (LCD) or an electronic view finder (EVF) mounted in the imaging device. In the live view function, image data of each frame to be displayed on the display device is generated from a pixel signal of each frame acquired from the image sensor, and the image data of each frame is sequentially displayed on the display device in units of frames.
FIG. 10 is a timing chart illustrating an example of schematic timings of the image sensor and the display device included in the imaging device according to the related art. In the following description, in order to distinguish the frame rate of the image sensor from the frame rate of the display device, a frame rate at which the pixel signal is acquired from the image sensor is referred to as an “imaging frame rate.” A frame rate at which the display device displays an image is referred to as a “display frame rate.” In FIG. 10, the imaging frame rate of the image sensor is 120 fps (frame/second). FIG. 10 illustrates a timing relation between an captured image as image data according to the pixel signal acquired from the image sensor and a display image as image data to be displayed on the display device when the display frame rate of the display device is 60 fps.
In FIG. 10, a “vertical synchronous signal of an image sensor” refers to a signal representing a start timing at which the pixel signal of each frame is acquired from the image sensor. “Vertical synchronous signal of a display device” refers to a signal representing a timing at which the display device starts to display an image of each frame. In FIG. 10, a period of time of “AF process” is a period of time in which the AF evaluation value generating unit included in the imaging device generates the AF evaluation value based on the captured image, FIG. 10 illustrates a case in which the timing of the “vertical synchronous signal of the image sensor” is synchronized with the timing of the “vertical synchronous signal of the display device” for the sake of a simple comparison of a timing relationship between the captured image and the display image.
In the imaging device according to the related art, when the imaging frame rate of the image sensor is different from the display frame rate of the display device, a method of thinning out the captured image and then displaying the resultant image on the display device is employed as illustrated in FIG. 10. In FIG. 10, since the display frame rate is half the imaging frame rate, an captured image in which each frame is thinned out to half is used as the display image.
Further, for example, techniques disclosed in Japanese Unexamined Patent Application, First Publication 2005-39710 and Japanese Unexamined Patent Application, First Publication 2007-336599 have been known as techniques of displaying a synthesized image. In the techniques disclosed in Japanese Unexamined Patent Application, First Publication 2005-39710 and Japanese Unexamined Patent Application, First Publication 2007-336599, the number of frames of an captured image to be synthesized changes according to the display frame rate used for the display of the display device.